Himalaya LCD

The LCD must be switched on using the ATI chip. the following code fragment does that.

absolutely no idea what these values are. the ASIC3 GPIO B outs switch off some unknown but LCD-power-related GPIO bits, then a pause is needed, then they can be re-enabled. seems to work.

except that the virtual memory address had to be mapped from 0xab010000->physical address 0x08010000 to 0xf5010000 -> physical address 0x08010000 because the linux arm kernel only supports 0xf0000000 to 0xc0000000 for device virtual memory addressing wot a pain.

This was sufficient information for D Bently to identify the chip as an ATI 3200, for which he has written a first version of an Imageon Accelerated driver. Apparently, the Toshiba e72x series uses the same chip, which does MPEG and everything.

#define HIMALAYA_ATI_CHIP_BASE 0xABA010000;
#define HIMALAYA_ATI (b) (*((volatile s *) (b + HIMALAYA_ATI_CHIP_BASE))

static void himalaya_init_ATI(void)

    HIMALAYA_ATI( 0x080 ) = 0x401BF;
    HIMALAYA_ATI( 0x084 ) = 0x50500D04;
    HIMALAYA_ATI( 0x088 ) = 0x4B000200;
    HIMALAYA_ATI( 0x08C) = 0xB11;
     HIMALAYA_ATI( 0x090) = 0xB1;
     HIMALAYA_ATI( 0x094 ) = 0x1;

     HIMALAYA_ATI( 0x098 ) = 0xFFFF11C5;
     HIMALAYA_ATI( 0x188 ) = 0x15FF1000;
     HIMALAYA_ATI( 0x410 )  = 3;
     HIMALAYA_ATI( 0x414 ) = 0x01D41C06;
     HIMALAYA_ATI( 0x418 ) = 0x100000;
     HIMALAYA_ATI( 0x41C ) = 0x1E0;
     HIMALAYA_ATI( 0x420 ) = 0x14F010F;
     HIMALAYA_ATI( 0x424 ) = 0xF00000;
     HIMALAYA_ATI( 0x428 ) = 0x14F000F;
     HIMALAYA_ATI( 0x42C ) = 0xF00000;
     HIMALAYA_ATI( 0x430 ) = 0x14F000F;

     HIMALAYA_ATI( 0x48C) = 0x80150014;
     HIMALAYA_ATI( 0x490) = 0xA0FB00F7;
     HIMALAYA_ATI( 0x494) = 0xA;
     HIMALAYA_ATI( 0x49C) = 0xA1700030;
     HIMALAYA_ATI( 0x4A0) = 0xC0080007;
     HIMALAYA_ATI( 0x4A4) = 0x80007;
     HIMALAYA_ATI( 0x4A8) = 0x8015010F;
     HIMALAYA_ATI( 0x4AC) = 0x0;
     HIMALAYA_ATI( 0x4B0) = 0x0;
     HIMALAYA_ATI( 0x4B4) = 0x0;
     HIMALAYA_ATI( 0x4C4) = 0x0;
     HIMALAYA_ATI( 0x4C8) = 0x3FFFF;
     HIMALAYA_ATI( 0x4CC) = 0xFFF003;
     HIMALAYA_ATI( 0x4D0) = 0x3;
     HIMALAYA_ATI( 0x4D4) = 0x100;
     HIMALAYA_ATI( 0x4E0) = 0x0;
     HIMALAYA_ATI( 0x4E4) = 0xFF00;
     HIMALAYA_ATI( 0x4F0) = 0x41060010;
     HIMALAYA_ATI( 0x524) = 0x102AA;
     HIMALAYA_ATI( 0x538) = 0x800000;
}


static void himalaya_LCDPowerOnOff(unsigned onoff)
{
    if (onoff == 1)
    {
        unsigned *asic3_base = 0xAFA00100;
     printk("himalaya LCD power on\n");
     /*BL    print_ATI_type*/

     ipaq_asic3_set_gpio_b(0x0008, 0);
     ipaq_asic3_set_gpio_b(0x0080, 0);
     ipaq_asic3_set_gpio_b(0x0100, 0);
     ipaq_asic3_set_gpio_b(0x0800, 0);

     sleep(10000000);

     ipaq_asic3_set_gpio_b(0x0080, 0x0080);
     sleep(500);

     ipaq_asic3_set_gpio_b(0x0100, 0x0100);
     himalaya_init_ATI();
     sleep(10000);

     ipaq_asic3_set_gpio_b(0x0800, 0x0800);
     sleep(10000);

     ipaq_asic3_set_gpio_b(0x0008, 0x0008);
    }
}

From the WinCE ROM we got the following register names for the ATI chip:

.text:80043F80 80 00 00 00+ATI_CMDS        DCD 0x80                          ; register
.text:80043F80 BF 00 00 0A+                                                  ; DATA XREF: .text:80083F20o
.text:80043F80 43 4C 4B 5F+                DCD 0xA0000BF                     ; command
.text:80043F80 50 49 4E 5F+                DCB "CLK_PIN_CNTL         "       ; name
.text:80043F80 43 4E 54 4C+                DCB 0,0,0                         ; pad0
.text:80043F80 20 20 20 20+                DCD 0                             ; pad1
.text:80043F80 20 20 20 20+                DCD 0                             ; pad2
.text:80043FA8 84 00 00 00+                DCD 0x84                          ; register
.text:80043FA8 01 09 10 2D+                DCD 0x2D100901                    ; command
.text:80043FA8 50 4C 4C 5F+                DCB "PLL_REF_FB_DIV     ",0,0     ; name
.text:80043FA8 52 45 46 5F+                DCB 0,0,0                         ; pad0
.text:80043FA8 46 42 5F 44+                DCD 0                             ; pad1
.text:80043FA8 49 56 20 20+                DCD 0                             ; pad2
.text:80043FD0 88 00 00 00+                DCD 0x88                          ; register
.text:80043FD0 00 CA 00 4B+                DCD 0x4B00CA00                    ; command
.text:80043FD0 50 4C 4C 5F+                DCB "PLL_CNTL             "       ; name
.text:80043FD0 43 4E 54 4C+                DCB "   "                         ; pad0
.text:80043FD0 20 20 20 20+                DCD 0                             ; pad1
.text:80043FD0 20 20 20 20+                DCD 0                             ; pad2
.text:80043FF8 8C 00 00 00+                DCD 0x8C                          ; register
.text:80043FF8 01 0B 00 00+                DCD 0xB01                         ; command
.text:80043FF8 53 43 4C 4B+                DCB "SCLK_CNTL            "       ; name
.text:80043FF8 5F 43 4E 54+                DCB " ",0,0                       ; pad0
.text:80043FF8 4C 20 20 20+                DCD 0                             ; pad1
.text:80043FF8 20 20 20 20+                DCD 0                             ; pad2
.text:80044020 90 00 00 00+                DCD 0x90                          ; register
.text:80044020 F1 00 00 00+                DCD 0xF1                          ; command
.text:80044020 50 43 4C 4B+                DCB "PCLK_CNTL            "       ; name
.text:80044020 5F 43 4E 54+                DCB " ",0,0                       ; pad0
.text:80044020 4C 20 20 20+                DCD 0                             ; pad1
.text:80044020 20 20 20 20+                DCD 0                             ; pad2
.text:80044048 94 00 00 00+                DCD 0x94                          ; register
.text:80044048 01 30 E6 00+                DCD 0xE63001                      ; command
.text:80044048 43 4C 4B 5F+                DCB "CLK_TEST_CNTL      ",0,0     ; name
.text:80044048 54 45 53 54+                DCB 0,0,0                         ; pad0
.text:80044048 5F 43 4E 54+                DCD 0                             ; pad1
.text:80044048 4C 20 20 20+                DCD 0                             ; pad2
.text:80044070 98 00 00 00+                DCD 0x98                          ; register
.text:80044070 C5 11 FF FF+                DCD 0xFFFF11C5                    ; command
.text:80044070 50 57 52 4D+                DCB "PWRMGT_CNTL         ",0      ; name
.text:80044070 47 54 5F 43+                DCB 0,0,0                         ; pad0
.text:80044070 4E 54 4C 20+                DCD 0                             ; pad1
.text:80044070 20 20 20 20+                DCD 0                             ; pad2
.text:80044098 88 01 00 00+                DCD 0x188                         ; register
.text:80044098 00 10 FF 15+                DCD 0x15FF1000                    ; command
.text:80044098 4D 43 5F 46+                DCB "MC_FB_LOCATION      ",0      ; name
.text:80044098 42 5F 4C 4F+                DCB 0,0,0                         ; pad0
.text:80044098 43 41 54 49+                DCD 0                             ; pad1
.text:80044098 4F 4E 20 20+                DCD 0                             ; pad2
.text:800440C0 10 04 00 00+                DCD 0x410                         ; register
.text:800440C0 03 00 00 00+                DCD 3                             ; command
.text:800440C0 4C 43 44 5F+                DCB "LCD_FORMAT          ",0      ; name
.text:800440C0 46 4F 52 4D+                DCB 0,0,0                         ; pad0
.text:800440C0 41 54 20 20+                DCD 0                             ; pad1
.text:800440C0 20 20 20 20+                DCD 0                             ; pad2
.text:800440E8 14 04 00 00+                DCD 0x414                         ; register
.text:800440E8 06 1C 8F 07+                DCD 0x78F1C06                     ; command
.text:800440E8 47 52 41 50+                DCB "GRAPHIC_CTRL       ",0,0     ; name
.text:800440E8 48 49 43 5F+                DCB 0,0,0                         ; pad0
.text:800440E8 43 54 52 4C+                DCD 0                             ; pad1
.text:800440E8 20 20 20 20+                DCD 0                             ; pad2
.text:80044110 18 04 00 00+                DCD 0x418                         ; register
.text:80044110 00 00 10 00+                DCD 0x100000                      ; command
.text:80044110 47 52 41 50+                DCB "GRAPHIC_OFFSET      ",0      ; name
.text:80044110 48 49 43 5F+                DCB 0,0,0                         ; pad0
.text:80044110 4F 46 46 53+                DCD 0                             ; pad1
.text:80044110 45 54 20 20+                DCD 0                             ; pad2
.text:80044138 1C 04 00 00+                DCD 0x41C                         ; register
.text:80044138 E0 01 00 00+                DCD 0x1E0                         ; command
.text:80044138 47 52 41 50+                DCB "GRAPHIC_PITCH       ",0      ; name
.text:80044138 48 49 43 5F+                DCB 0,0,0                         ; pad0
.text:80044138 50 49 54 43+                DCD 0                             ; pad1
.text:80044138 48 20 20 20+                DCD 0                             ; pad2
.text:80044160 20 04 00 00+                DCD 0x420                         ; register
.text:80044160 0F 01 4F 01+                DCD 0x14F010F                     ; command
.text:80044160 43 52 54 43+                DCB "CRTC_TOTAL          ",0      ; name
.text:80044160 5F 54 4F 54+                DCB 0,0,0                         ; pad0
.text:80044160 41 4C 20 20+                DCD 0                             ; pad1
.text:80044160 20 20 20 20+                DCD 0                             ; pad2
.text:80044188 24 04 00 00+                DCD 0x424                         ; register
.text:80044188 00 00 F0 00+                DCD 0xF00000                      ; command
.text:80044188 41 43 54 49+                DCB "ACTIVE_H_DISP       ",0      ; name
.text:80044188 56 45 5F 48+                DCB 0,0,0                         ; pad0
.text:80044188 5F 44 49 53+                DCD 0                             ; pad1
.text:80044188 50 20 20 20+                DCD 0                             ; pad2
.text:800441B0 28 04 00 00+                DCD 0x428                         ; register
.text:800441B0 0F 00 4F 01+                DCD 0x14F000F                     ; command
.text:800441B0 41 43 54 49+                DCB "ACTIVE_V_DISP       ",0      ; name
.text:800441B0 56 45 5F 56+                DCB 0,0,0                         ; pad0
.text:800441B0 5F 44 49 53+                DCD 0                             ; pad1
.text:800441B0 50 20 20 20+                DCD 0                             ; pad2
.text:800441D8 2C 04 00 00+                DCD 0x42C                         ; register
.text:800441D8 00 00 F0 00+                DCD 0xF00000                      ; command
.text:800441D8 47 52 41 50+                DCB "GRAPHIC_H_DISP      ",0      ; name
.text:800441D8 48 49 43 5F+                DCB 0,0,0                         ; pad0
.text:800441D8 48 5F 44 49+                DCD 0                             ; pad1
.text:800441D8 53 50 20 20+                DCD 0                             ; pad2
.text:80044200 30 04 00 00+                DCD 0x430                         ; register
.text:80044200 0F 00 4F 01+                DCD 0x14F000F                     ; command
.text:80044200 47 52 41 50+                DCB "GRAPHIC_V_DISP      ",0      ; name
.text:80044200 48 49 43 5F+                DCB 0,0,0                         ; pad0
.text:80044200 56 5F 44 49+                DCD 0                             ; pad1
.text:80044200 53 50 20 20+                DCD 0                             ; pad2
.text:80044228 8C 04 00 00+                DCD 0x48C                         ; register
.text:80044228 14 00 15 80+                DCD 0x80150014                    ; command
.text:80044228 43 52 54 43+                DCB "CRTC_SS             ",0      ; name
.text:80044228 5F 53 53 20+                DCB 0,0,0                         ; pad0
.text:80044228 20 20 20 20+                DCD 0                             ; pad1
.text:80044228 20 20 20 20+                DCD 0                             ; pad2
.text:80044250 90 04 00 00+                DCD 0x490                         ; register
.text:80044250 F7 00 FB A0+                DCD 0xA0FB00F7                    ; command
.text:80044250 43 52 54 43+                DCB "CRTC_LS             ",0      ; name
.text:80044250 5F 4C 53 20+                DCB 0,0,0                         ; pad0
.text:80044250 20 20 20 20+                DCD 0                             ; pad1
.text:80044250 20 20 20 20+                DCD 0                             ; pad2
.text:80044278 94 04 00 00+                DCD 0x494                         ; register
.text:80044278 0A 00 00 00+                DCD 0xA                           ; command
.text:80044278 43 52 54 43+                DCB "CRTC_REV            ",0      ; name
.text:80044278 5F 52 45 56+                DCB 0,0,0                         ; pad0
.text:80044278 20 20 20 20+                DCD 0                             ; pad1
.text:80044278 20 20 20 20+                DCD 0                             ; pad2
.text:800442A0 9C 04 00 00+                DCD 0x49C                         ; register
.text:800442A0 30 00 70 81+                DCD 0x81700030                    ; command
.text:800442A0 43 52 54 43+                DCB "CRTC_DCLK           ",0      ; name
.text:800442A0 5F 44 43 4C+                DCB 0,0,0                         ; pad0
.text:800442A0 4B 20 20 20+                DCD 0                             ; pad1
.text:800442A0 20 20 20 20+                DCD 0                             ; pad2
.text:800442C8 A0 04 00 00+                DCD 0x4A0                         ; register
.text:800442C8 07 00 08 C0+                DCD 0xC0080007                    ; command
.text:800442C8 43 52 54 43+                DCB "CRTC_GS             ",0      ; name
.text:800442C8 5F 47 53 20+                DCB 0,0,0                         ; pad0
.text:800442C8 20 20 20 20+                DCD 0                             ; pad1
.text:800442C8 20 20 20 20+                DCD 0                             ; pad2
.text:800442F0 A4 04 00 00+                DCD 0x4A4                         ; register
.text:800442F0 07 00 08 00+                DCD 0x80007                       ; command
.text:800442F0 43 52 54 43+                DCB "CRTC_VPOS_GS        ",0      ; name
.text:800442F0 5F 56 50 4F+                DCB 0,0,0                         ; pad0
.text:800442F0 53 5F 47 53+                DCD 0                             ; pad1
.text:800442F0 20 20 20 20+                DCD 0                             ; pad2
.text:80044318 A8 04 00 00+                DCD 0x4A8                         ; register
.text:80044318 0F 01 15 80+                DCD 0x8015010F                    ; command
.text:80044318 43 52 54 43+                DCB "CRTC_GCLK           ",0      ; name
.text:80044318 5F 47 43 4C+                DCB 0,0,0                         ; pad0
.text:80044318 4B 20 20 20+                DCD 0                             ; pad1
.text:80044318 20 20 20 20+                DCD 0                             ; pad2
.text:80044340 AC 04 00 00+                DCD 0x4AC                         ; register
.text:80044340 00 00 00 00+                DCD 0                             ; command
.text:80044340 43 52 54 43+                DCB "CRTC_GOE            ",0      ; name
.text:80044340 5F 47 4F 45+                DCB 0,0,0                         ; pad0
.text:80044340 20 20 20 20+                DCD 0                             ; pad1
.text:80044340 20 20 20 20+                DCD 0                             ; pad2
.text:80044368 B0 04 00 00+                DCD 0x4B0                         ; register
.text:80044368 00 00 00 00+                DCD 0                             ; command
.text:80044368 43 52 54 43+                DCB "CRTC_FRAME          ",0      ; name
.text:80044368 5F 46 52 41+                DCB 0,0,0                         ; pad0
.text:80044368 4D 45 20 20+                DCD 0                             ; pad1
.text:80044368 20 20 20 20+                DCD 0                             ; pad2
.text:80044390 B4 04 00 00+                DCD 0x4B4                         ; register
.text:80044390 00 00 00 00+                DCD 0                             ; command
.text:80044390 43 52 54 43+                DCB "CRTC_FRAME_VPOS     ",0      ; name
.text:80044390 5F 46 52 41+                DCB 0,0,0                         ; pad0
.text:80044390 4D 45 5F 56+                DCD 0                             ; pad1
.text:80044390 50 4F 53 20+                DCD 0                             ; pad2
.text:800443B8 C4 04 00 00+                DCD 0x4C4                         ; register
.text:800443B8 00 00 00 00+                DCD 0                             ; command
.text:800443B8 4C 43 44 44+                DCB "LCDD_CNTL1          ",0      ; name
.text:800443B8 5F 43 4E 54+                DCB 0,0,0                         ; pad0
.text:800443B8 4C 31 20 20+                DCD 0                             ; pad1
.text:800443B8 20 20 20 20+                DCD 0                             ; pad2
.text:800443E0 C8 04 00 00+                DCD 0x4C8                         ; register
.text:800443E0 FF FF 03 00+                DCD 0x3FFFF                       ; command
.text:800443E0 4C 43 44 44+                DCB "LCDD_CNTL2          ",0      ; name
.text:800443E0 5F 43 4E 54+                DCB 0,0,0                         ; pad0
.text:800443E0 4C 32 20 20+                DCD 0                             ; pad1
.text:800443E0 20 20 20 20+                DCD 0                             ; pad2
.text:80044408 CC 04 00 00+                DCD 0x4CC                         ; register
.text:80044408 03 F0 FF 00+                DCD 0xFFF003                      ; command
.text:80044408 47 45 4E 4C+                DCB "GENLCD_CNTL1        ",0      ; name
.text:80044408 43 44 5F 43+                DCB 0,0,0                         ; pad0
.text:80044408 4E 54 4C 31+                DCD 0                             ; pad1
.text:80044408 20 20 20 20+                DCD 0                             ; pad2
.text:80044430 D0 04 00 00+                DCD 0x4D0                         ; register
.text:80044430 03 00 00 00+                DCD 3                             ; command
.text:80044430 47 45 4E 4C+                DCB "GENLCD_CNTL2        ",0      ; name
.text:80044430 43 44 5F 43+                DCB 0,0,0                         ; pad0
.text:80044430 4E 54 4C 32+                DCD 0                             ; pad1
.text:80044430 20 20 20 20+                DCD 0                             ; pad2
.text:80044458 D4 04 00 00+                DCD 0x4D4                         ; register
.text:80044458 00 01 00 00+                DCD 0x100                         ; command
.text:80044458 44 49 53 50+                DCB "DISP_DEBUG",9,"       ",0,0,0; name
.text:80044458 5F 44 45 42+                DCB 0,0,0                         ; pad0
.text:80044458 55 47 09 20+                DCD 0                             ; pad1
.text:80044458 20 20 20 20+                DCD 0                             ; pad2
.text:80044480 E0 04 00 00+                DCD 0x4E0                         ; register
.text:80044480 00 00 00 00+                DCD 0                             ; command
.text:80044480 43 52 54 43+                DCB "CRTC_DEFAULT_COUNT  ",0      ; name
.text:80044480 5F 44 45 46+                DCB 0,0,0                         ; pad0
.text:80044480 41 55 4C 54+                DCD 0                             ; pad1
.text:80044480 5F 43 4F 55+                DCD 0                             ; pad2
.text:800444A8 E4 04 00 00+                DCD 0x4E4                         ; register
.text:800444A8 00 FF 00 00+                DCD 0xFF00                        ; command
.text:800444A8 4C 43 44 5F+                DCB "LCD_BACKGROUND_COLOR",0      ; name
.text:800444A8 42 41 43 4B+                DCB 0,0,0                         ; pad0
.text:800444A8 47 52 4F 55+                DCD 0                             ; pad1
.text:800444A8 4E 44 5F 43+                DCD 0                             ; pad2
.text:800444D0 F0 04 00 00+                DCD 0x4F0                         ; register
.text:800444D0 10 00 06 41+                DCD 0x41060010                    ; command
.text:800444D0 43 52 54 43+                DCB "CRTC_PS1_ACTIVE     ",0      ; name
.text:800444D0 5F 50 53 31+                DCB 0,0,0                         ; pad0
.text:800444D0 5F 41 43 54+                DCD 0                             ; pad1
.text:800444D0 49 56 45 20+                DCD 0                             ; pad2
.text:800444F8 24 05 00 00+                DCD 0x524                         ; register
.text:800444F8 AA 02 01 00+                DCD 0x102AA                       ; command
.text:800444F8 47 45 4E 4C+                DCB "GENLCD_CNTL3        ",0      ; name
.text:800444F8 43 44 5F 43+                DCB 0,0,0                         ; pad0
.text:800444F8 4E 54 4C 33+                DCD 0                             ; pad1
.text:800444F8 20 20 20 20+                DCD 0                             ; pad2
.text:80044520 38 05 00 00+                DCD 0x538                         ; register
.text:80044520 00 00 80 00+                DCD 0x800000                      ; command
.text:80044520 44 49 53 50+                DCB "DISP_DEBUG2",9,"       ",0,0 ; name
.text:80044520 5F 44 45 42+                DCB 0,0,0                         ; pad0
.text:80044520 55 47 32 09+                DCD 0                             ; pad1
.text:80044520 20 20 20 20+                DCD 0                             ; pad2
.text:80044548 80 00 00 00+ATI_reset_table DCD 0x80                          ; register
.text:80044548 BF 01 04 00+                                                  ; DATA XREF: .text:80083F4Co
.text:80044548 43 4C 4B 5F+                DCD 0x401BF                       ; command
.text:80044548 50 49 4E 5F+                DCB "CLK_PIN_CNTL        ",0      ; name
.text:80044548 43 4E 54 4C+                DCB 0,0,0                         ; pad0
.text:80044548 20 20 20 20+                DCD 0                             ; pad1
.text:80044548 20 20 20 20+                DCD 0                             ; pad2
.text:80044570 84 00 00 00+                DCD 0x84                          ; register
.text:80044570 04 0D 50 50+                DCD 0x50500D04                    ; command
.text:80044570 50 4C 4C 5F+                DCB "PLL_REF_FB_DIV      ",0      ; name
.text:80044570 52 45 46 5F+                DCB 0,0,0                         ; pad0
.text:80044570 46 42 5F 44+                DCD 0                             ; pad1
.text:80044570 49 56 20 20+                DCD 0                             ; pad2
.text:80044598 88 00 00 00+                DCD 0x88                          ; register
.text:80044598 00 02 00 4B+                DCD 0x4B000200                    ; command
.text:80044598 50 4C 4C 5F+                DCB "PLL_CNTL            ",0      ; name
.text:80044598 43 4E 54 4C+                DCB 0,0,0                         ; pad0
.text:80044598 20 20 20 20+                DCD 0                             ; pad1
.text:80044598 20 20 20 20+                DCD 0                             ; pad2
.text:800445C0 8C 00 00 00+                DCD 0x8C                          ; register
.text:800445C0 11 0B 00 00+                DCD 0xB11                         ; command
.text:800445C0 53 43 4C 4B+                DCB "SCLK_CNTL           ",0      ; name
.text:800445C0 5F 43 4E 54+                DCB 0,0,0                         ; pad0
.text:800445C0 4C 20 20 20+                DCD 0                             ; pad1
.text:800445C0 20 20 20 20+                DCD 0                             ; pad2
.text:800445E8 90 00 00 00+                DCD 0x90                          ; register
.text:800445E8 B1 00 00 00+                DCD 0xB1                          ; command
.text:800445E8 50 43 4C 4B+                DCB "PCLK_CNTL           ",0      ; name
.text:800445E8 5F 43 4E 54+                DCB 0,0,0                         ; pad0
.text:800445E8 4C 20 20 20+                DCD 0                             ; pad1
.text:800445E8 20 20 20 20+                DCD 0                             ; pad2
.text:80044610 94 00 00 00+                DCD 0x94                          ; register
.text:80044610 01 00 00 00+                DCD 1                             ; command
.text:80044610 43 4C 4B 5F+                DCB "CLK_TEST_CNTL       ",0      ; name
.text:80044610 54 45 53 54+                DCB 0,0,0                         ; pad0
.text:80044610 5F 43 4E 54+                DCD 0                             ; pad1
.text:80044610 4C 20 20 20+                DCD 0                             ; pad2
.text:80044638 98 00 00 00+                DCD 0x98                          ; register
.text:80044638 C5 11 FF FF+                DCD 0xFFFF11C5                    ; command
.text:80044638 50 57 52 4D+                DCB "PWRMGT_CNTL         ",0      ; name
.text:80044638 47 54 5F 43+                DCB 0,0,0                         ; pad0
.text:80044638 4E 54 4C 20+                DCD 0                             ; pad1
.text:80044638 20 20 20 20+                DCD 0                             ; pad2